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MSP430F5529LP Hardware Library: CLOCK


This webpage provides information about the CLOCK hardware library created for the MSP430F5529LP Development Board.


The MSP430F5529LP_CLOCK.h/c files configure the core voltage and clock module to run the MCLK and SMCLK sources at 24 MHz, and the ACLK source at 32.768 KHz.

These files are always required to use the operating environment, and the CLOCK module must be initialized first, before any other initialization occurs.

Public Definitions

CLOCK_FREQ      24000000.0 This value is used by other library modules or accessory libraries to calculate fixed delays. If the clock frequency is modified, this definition also needs to be modified.

Public Functions

void MSP430F5529LP_CLOCK_Initialize(void); Initializes the Power Management Module (PMM), Supply Voltage Supervisor (SVS), and the Unified Clock System (UCS).

Instructions for Use

During initialization at the beginning of the main function, make the following function call. No parameters are required. After executing this function call, the core voltage will be set for high frequency operation, the MCLK and SMCLK sources will be configured for 24 MHz, and the ACLK source will be configured for 32.768 KHz.


Main Clock Settings

There are several possible options for obtaining a 24 MHz clock frequency. The code for some of these options was left within the library file for reference, and all but one are commented out. The method chosen was to use the 4 MHz (XT2) oscillator input with no pre-scaler (divide by 1). This resulted in the best overall accuracy.

Average: 24.004 MHz +0.0166%
Max: 24.856 MHz +3.54%
Min: 23.510 MHz -2.06%